ST7DALIF2 STMicroelectronics, ST7DALIF2 Datasheet - Page 88

• Manufacturer Part Number: ST7DALIF2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7DALIF2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• 256 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

Lite timer 2 (LT2)
15.6.5
88/171
Bit 5 = TB Timebase period selection.
This bit is set and cleared by software.
0: Timebase period = t
1: Timebase period = t
Bit 4 = TB1IE Timebase Interrupt enable.
This bit is set and cleared by software.
0: Timebase (TB1) interrupt disabled
1: Timebase (TB1) interrupt enabled
Bit 3 = TB1F Timebase Interrupt Flag.
This bit is set by hardware and cleared by software reading the LTCSR register. Writing to
this bit has no effect.
0: No counter overflow
1: A counter overflow has occurred
Bits 2:0 = Reserved
Lite timer input capture register (LTICR)
Read only
Reset Value: 0000 0000 (00h)
Bits 7:0 = ICR[7:0] Input Capture Value
These bits are read by software and cleared by hardware after a reset. If the ICF bit in the
LTCSR is cleared, the value of the 8-bit up-counter will be captured when a rising or falling
edge occurs on the LTIC pin.
Table 42.
Address
(Hex.)
ICR7
0A
08
09
7
LTCSR2
Reset
Value
LTARR
Reset
Value
LTCNTR
Reset
Value
Register
Lite timer register map and reset values
label
ICR6
OSC
OSC
CNT7
AR7
7
0
0
0
ICR5
* 8000 (1ms @ 8 MHz)
* 16000 (2ms @ 8 MHz)
CNT6
AR6
6
0
0
0
ICR4
CNT5
AR5
5
0
0
0
ICR3
CNT4
AR4
4
0
0
0
CNT3
AR3
3
0
0
0
ICR2
CNT2
AR2
2
0
0
0
ICR1
TB2IE
CNT1
AR1
1
0
0
0
ST7DALIF2
ICR0
CNT0
TB2F
AR0
0
0
0
0
0