HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 119

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

(See Table 4.3 on page 130 for suitable V_FIFO_MD and V_FIFO_SZ values.)
March 2003 (rev. A)
HFC-4S
HFC-8S
R_FIFO_MD
FIFO mode configuration
1..0
2
3
5..4
7..6
Bits
0
0
0
0
Value
Reset
V_FIFO_MD
V_CSM_MD
V_FSM_MD
V_FIFO_SZ
(reserved)
Name
(write only)
Data Sheet
Data flow
Description
FIFO mode
This bitmap and V_FIFO_SZ are used to organize
the FIFOs in the internal or external SRAM.
Channel select mode (CSM)
’0’ = disable CSM (FIFO number = HFC-channel
number)
’1’ = enable CSM
Note: The HFC-4S / 8S works in Simple Mode
(SM) if CSM and FSM are both disabled.
FIFO sequence mode (FSM)
’0’ = disable FSM
’1’ = enable FSM
Note: In most cases where FSM is selected, also
CSM should be enabled.
FIFO size
This bitmap and V_FIFO_MD are used to organize
the FIFOs in the internal or external SRAM. The
actual FIFO sizes depend on the used SRAM size.
Must be ’00’.
Cologne
Chip
119 of 273
0x0D