HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 194

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HFC-4S

Manufacturer Part Number
HFC-4S
Description
Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
Manufacturer
Cologne Chip AG
Datasheet
HFC-4S
HFC-8S
194 of 273
R_PWM_MD
PWM output mode register
2..0
3
5..4
7..6
Bits
0
0
0
0
Value
Reset
Name
(reserved)
V_EXT_IRQ_EN
V_PWM0_MD
V_PWM1_MD
Multiparty audio conferences
(write only)
Data Sheet
Description
Must be ’000’.
External interrupt enable
’0’ = normal operation
’1’ = external interrupt from GPI24 . . . GPI31
enable (These pins must be connected to a pull-up
resistor to VDD. Any low input signal on one of the
lines will generate an external interrupt.)
Output buffer configuration for pin PWM0
’00’ =PWM output tristate (disable)
’01’ = PWM push / pull output
’10’ = PWM push to 0 only
’11’ = PWM pull to 1 only
Output buffer configuration for pin PWM1
’00’ = PWM output tristate (disable)
’01’ = PWM push / pull output
’10’ = PWM push to 0 only
’11’ = PWM pull to 1 only
March 2003 (rev. A)
Cologne
Chip
0x46

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