HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 14

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
List of Registers (sorted by name)
Write only registers:
14 of 273
Address
0xFC
0xFD
0xD1
0xD0
0x3C
0x3D
0xFB
0xFA
0x0E
0xFF
0x3E
0x1B
0xF4
0x37
0x31
0x32
0x33
0x34
0x30
0x45
G
Register addresses are assigned independently for write and read access, i.e. in
many cases there are different registers for write and read access with the same
address. Only registers with the same meaning and bitmap structure in write and
read direction are declared to be read & write.
It must be distinguished between registers, array registers and multi-registers.
Array registers have multiple instances and are indexed by a number. This in-
Multi-registers have multiple instances, too, but they are selected by a bitmap
The first letter of array register names is ‘A_ . . . ’ whereas all other registers begin
with ‘R_ . . . ’. The index of array registers and multi-registers has to be specified
in the appropriate register.
Name
A_CH_MSK
A_CHANNEL
A_CON_HDLC
A_CONF
A_FIFO_SEQ
R_INC_RES_FIFO
A_IRQ_MSK
A_SL_CFG
A_ST_B1_TX
A_ST_B2_TX
A_ST_CLK_DLY
A_ST_CTRL0
A_ST_CTRL1
A_ST_CTRL2
A_ST_D_TX
A_ST_SQ_WR
A_ST_WR_STA
A_SUBCH_CFG
R_BERT_WD_MD
R_BRG_CTRL
Please note !
dex is either the FIFO number (R_FIFO with 13 indexed registers), the
PCM time slot number (R_SLOT with 2 indexed registers) or the S/T in-
terface number (R_ST_SEL with 15 indexed registers). Array registers
have equal name, bitmap structure and meaning for every instance.
value. With this value, different registers can be selected with the same
address.
R_PCM_MD0) and 0x0F (2 instances selected by R_FIFO_MD) for
HFC-4S / 8S. Multi-registers have different names, bitmap structure and
meaning for each instance.
Multi-register addresses are 0x15 (14 instances selected by
group
0, 1, 3
0, 1, 3
0, 1, 3
0, 1, 3
0, 1, 3
0, 1, 3
0, 1, 3
0, 1, 3
Reset
0, 1
0, 1
0, 1
0, 1
0, 1
0, 3
0, 1
0, 1
–
–
–
0
Page
123
126
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200
126
136
234
122
167
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166
163
164
165
168
165
162
125
211
222
Data Sheet
Address
0x4C
0x4D
0x1C
0x1D
0x0D
0x4E
0x4A
0x4B
0x0B
0x4F
0x0F
0x0F
0x47
0x02
0x48
0x49
0x00
0x18
0x01
0x42
0x43
0x40
Name
R_BRG_MD
R_BRG_PCM_CFG
R_BRG_TIM_SEL01
R_BRG_TIM_SEL23
R_BRG_TIM_SEL45
R_BRG_TIM_SEL67
R_BRG_TIM0
R_BRG_TIM1
R_BRG_TIM2
R_BRG_TIM3
R_CIRM
R_CONF_EN
R_CTRL
R_DTMF0
R_DTMF1
R_FIFO_MD
R_FIFO
R_FIRST_FIFO
R_FSM_IDX
R_GPIO_EN0
R_GPIO_EN1
R_GPIO_OUT0
March 2003 (rev. A)
group
Reset
0, 2
0, 1
0, 1
0, 1
H
H
H
H
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Cologne
Chip
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