HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 264

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
A.1 S/T interface activation / deactivation layer 1 of finite state matrix
Legend:
Notes:
Note 1: Timer 1 (T1) is not implemented in the HFC-4S / 8S and must be implemented in software.
Note 2: Timer 2 (T2) prevents unintentional reactivation. Its value is 32 ms (
Note 3: After reset the state machine is fixed to G0.
Note 4: Bit V_SET_G2_G3 of the A_ST_WR_STA register must be set to allow this transition or
264 of 273
— No state change
/ Impossible by the definition of peer-to-peer physical layer procedures or system internal rea-
Event:
State machine release
(Note 3)
Activate request
Deactivate request
Expiry T2 (Note 2)
Receiving INFO 0
Receiving INFO 1
Receiving INFO 3
Lost framing
sons
Impossible by the definition of the physical layer service
implies that a TE has to recognize INFO 0 and to react on it within this time.
V_G2_G3_EN is set to allow automatic transition G2
for NT
State number:
Table A.1: Activation / deactivation layer 1 for finite state matrix for NT
State name:
INFO sent:
(Note 1)
INFO 0
Reset
G 0
G 1
G 2
—
—
—
—
—
—
Deactivate
(Note 1)
(Note 1)
INFO 0
State matrices
G 1
G 2
G 2
—
—
/
/
Data Sheet
Start timer T2
activation
(Note 1, 4)
Pending
INFO 2
G 2
G 4
G 3
—
—
—
/
G3 (register A_ST_CTRL1).
Start timer T2
INFO 4
Active
G 3
G 2
G 4
G2
—
—
/
March 2003 (rev. A)
¾
deactivation
¡
Pending
(Note 1)
INFO 0
½¾
G 4
G 2
G 1
G1
—
—
—
Cologne
Chip
×
). This