HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 40

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
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Pin
Interface
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
1st function
2nd function
PCI
ISA PnP
PCMCIA
Processor
SPI
Name
R_A1
GPI7
LEV_A1
GPI6
LEV_B1
GPI5
R_B1
GPI4
ADJ_LEV1
VDD_ST
T_A1
GPIO3
T_B1
GPIO2
T_B0
GPIO1
T_A0
GPIO0
GND
ADJ_LEV0
R_B0
GPI3
LEV_B0
GPI2
LEV_A0
GPI1
R_A0
GPI0
GND
VDD
VDD
VDD
VDD
VDD
/SPISEL
Ood
Ood
I/O
IO
IO
IO
IO
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Universal bus interface
General description
Description
S/T interface no. 1 receive input A
General Purpose Input pin 7
S/T interface no. 1 level detect A
General Purpose Input pin 6
S/T interface no. 1 level detect B
General Purpose Input pin 5
S/T interface no. 1 receive input B
General Purpose Input pin 4
S/T interface no. 1 level generator
app. +2.8 V nominal power sup-
ply (depends on the S/T transmit
amplitude)
S/T interface no. 1 transmit data A
General Purpose I/O pin 3
S/T interface no. 1 transmit data B
General Purpose I/O pin 2
S/T interface no. 0 transmit data B
General Purpose I/O pin 1
S/T interface no. 0 transmit data A
General Purpose I/O pin 0
Ground
S/T interface no. 0 level generator
S/T interface no. 0 receive input B
General Purpose Input pin 3
S/T interface no. 0 level detect B
General Purpose Input pin 2
S/T interface no. 0 level detect A
General Purpose Input pin 1
S/T interface no. 0 receive input A
General Purpose Input pin 0
Ground
+3.3 V power supply
+3.3 V power supply
+3.3 V power supply
+3.3 V power supply
+3.3 V power supply
SPI device select low active
Data Sheet
(continued from previous page)
S/T
LVCMOS
LVCMOS
LVCMOS
S/T
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
S/T
LVCMOS
LVCMOS
LVCMOS
S/T
LVCMOS
S/T
S/T
S/T
S/T
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
(continued on next page)
March 2003 (rev. A)
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Cologne
Chip
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16
16
16
16
16
16
16
16
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