HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 169

no-image

HFC-4S

Manufacturer Part Number
HFC-4S
Description
Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
Manufacturer
Cologne Chip AG
Datasheet
March 2003 (rev. A)
HFC-4S
HFC-8S
A_ST_RD_STA [ST]
S/T state machine register
This register is used to read the current state. A new state can be set with the A_ST_WR_STA
register.
Before reading this array register the S/T interface must be selected byregister R_ST_SEL.
3..0
4
5
6
7
Bits
0
0
0
0
0
Value
Reset
V_ST_STA
V_FR_SYNC
V_TI2_EXP
V_INFO0
V_G2_G3
Name
S/T interface
(read only)
Data Sheet
Description
S/T state
Binary value of current state (NT: Gx, TE: Fx)
Frame synchronization
’0’ = not synchronized
’1’ = synchronized
Timer exired
’1’ = timer TI2 expired (NT mode only)
INFO0
’1’ = receiving INFO0
G2 to G3 transition allowed
’0’ = no operation
’1’ = allows transition from G2 to G3 in NT mode
This bit is automatically cleared after the transition
and has no function in TE mode.
Cologne
Chip
169 of 273
0x30

Related parts for HFC-4S