HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 146

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
The HFC-4S / 8S is equiped with 4 respectively 8 S/T interfaces according to ITU-T I.430 and
ETSI TBR03 specifications. They can all individually be configured into TE or NT mode by set-
ting V_ST_MD in the register A_ST_CTRL0.
146 of 273
Number
HFC-8S only:
124
125
126
127
128
129
130
131
132
133
135
136
137
138
139
142
143
144
145
146
147
148
149
150
151
153
154
155
156
157
R_A7
LEV_A7
LEV_B7
R_B7
ADJ_LEV7
VDD_ST
T_A7
T_B7
T_B6
T_A6
ADJ_LEV6
R_B6
LEV_B6
LEV_A6
R_A6
R_A5
LEV_A5
LEV_B5
R_B5
ADJ_LEV5
VDD_ST
T_A5
T_B5
T_B4
T_A4
ADJ_LEV4
R_B4
LEV_B4
LEV_A4
R_A4
Name
Table 5.2: Overview of the HFC-4S and HFC-8S S/T pins
Interf.
7 & 6
5 & 4
7
7
7
7
7
7
7
6
6
6
6
6
6
6
5
5
5
5
5
5
5
4
4
4
4
4
4
4
Description
RX input A
RX input B
power supply
TX data A
TX data B
TX data B
TX data A
RX input B
RX input A
RX input A
RX input B
power supply
TX data A
TX data B
TX data B
TX data A
RX input B
RX input A
level detect A
level detect B
level generator
level generator
level detect B
level detect A
level detect A
level detect B
level generator
level generator
level detect B
level detect A
S/T interface
Data Sheet
Number
HFC-4S and HFC-8S:
159
160
161
162
163
164
165
166
167
168
170
171
172
173
174
176
177
178
179
180
181
182
183
184
185
187
188
189
190
191
R_A3
LEV_A3
LEV_B3
R_B3
ADJ_LEV3
VDD_ST
T_A3
T_B3
T_B2
T_A2
ADJ_LEV2
R_B2
LEV_B2
LEV_A2
R_A2
R_A1
LEV_A1
LEV_B1
R_B1
ADJ_LEV1
VDD_ST
T_A1
T_B1
T_B0
T_A0
ADJ_LEV0
R_B0
LEV_B0
LEV_A0
R_A0
Name
Interf.
3 & 2
1 & 0
3
3
3
3
3
3
3
2
2
2
2
2
2
2
1
1
1
1
1
1
1
0
0
0
0
0
0
0
March 2003 (rev. A)
power supply
TX data A
TX data B
TX data B
TX data A
power supply
Description
RX input A
level detect A
level detect B
RX input B
level generator
level generator
RX input B
level detect B
level detect A
RX input A
RX input A
level detect A
level detect B
RX input B
level generator
TX data A
TX data B
TX data B
TX data A
level generator
RX input B
level detect B
level detect A
RX input A
Cologne
Chip