HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 54

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

HFC-4S
HFC-8S
2.3 ISA Plug and Play interface
ISA Plug and Play mode is selected by MODE0
eight consecutive addresses in the I/O map of a PC for operation. Usually also one out of several ISA
IRQ lines is used. Section 2.3.1 describes how to configure the interrupt lines of the HFC-4S / 8S.
The port address is selected by the lines SA0 . . . SA15. The address with SA2
register selection via the CIP (Control Internal Pointer) and the address with SA2
data read / write like shown in Table 2.10. The bits SA3 . . . SA15 are decoded by the address decoder
to match the PnP configuration address.
The HFC-4S / 8S has no memory or DMA access to any component on the ISA PC bus. Because of
its characteristic power drive no external driver for the ISA PC bus data lines is needed. If necessary
(e.g. due to an old ISA specification which requires 24 mA output current) an external bus driver can
be added. In this case the output signal /BUSDIR determines the driver direction.
54 of 273
203 . . . 206,1 . . . 4
Table 2.10: ISA address decoding (X
106 . . . 112
Table 2.9: Overview of the ISA PnP interface pins
Number
31 . . . 39
43 . . . 51
SA2
8 . . . 17
X
X
0
0
1
1
Universal external bus interface
198
18
20
21
22
25
30
/IOR
X
1
0
1
0
1
Name
SA15 . . . SA8
SA7 . . . SA0
SD15 . . . SD8
SD7 . . . SD0
IRQ6 . . . IRQ0
/IOIS16
/AEN
/IOR
/IOW
/BUSDIR
/SBHE
RESET
Data Sheet
/IOW
X
1
1
0
1
0
/AEN
¼
X
Description
Address byte 1
Address byte 0
Data byte 1
Data byte 0
ISA Interrupt Request 6 . . . 0
16 bit access enable
Address Enable
Read Enable
Write Enable
Bus Direction
High byte enable
Reset high active
1
0
0
0
0
and MODE1
read data
write data
read CIP
write CIP
Operation
no access
no access
don’t care)
½
. The HFC-4S / 8S needs
March 2003 (rev. A)
’1’ is used for
’0’ is used for
Cologne
Chip