HFC-4S Cologne Chip AG, HFC-4S Datasheet - Page 235

• Manufacturer Part Number: HFC-4S
• Description: Isdn HDLC Fifo Controller With 8 (4) Integrated S/t Interfaces
• Manufacturer: Cologne Chip AG

12.5.2 Read only register
March 2003 (rev. A)
HFC-4S
HFC-8S
R_IRQ_OVIEW
FIFO interrupt overview register
Every bit with value ’1’ indicates that an interrupt has occured in the FIFO block.
FIFO block consists of 4 transmit and 4 receive FIFOs. The exact FIFO can be determined by
reading the R_IRQ_FIFO_BL0 . . . R_IRQ_FIFO_BL7 registers that belong to the specified
FIFO block.
Reading any R_IRQ_FIFO_BL0 . . . R_IRQ_FIFO_BL7 registers clear the correspond-
ing bit in this register. Reading this overview register does not clear any interrupt bit.
0
1
2
3
4
5
6
7
Bits
Value
Reset
V_IRQ_FIFO_BL0
V_IRQ_FIFO_BL1
V_IRQ_FIFO_BL2
V_IRQ_FIFO_BL3
V_IRQ_FIFO_BL4
V_IRQ_FIFO_BL5
V_IRQ_FIFO_BL6
V_IRQ_FIFO_BL7
Name
Clock, reset, interrupt, timer and watchdog
(read only)
Data Sheet
Description
Interrupt overview of FIFO block 0
(FIFOs 0 . . . 3)
Interrupt overview of FIFO block 1
(FIFOs 4 . . . 7)
Interrupt overview of FIFO block 2
(FIFOs 8 . . . 11)
Interrupt overview of FIFO block 3
(FIFOs 12 . . . 15)
Interrupt overview of FIFO block 4
(FIFOs 16 . . . 19)
Interrupt overview of FIFO block 5
(FIFOs 20 . . . 23)
Interrupt overview of FIFO block 6
(FIFOs 24 . . . 27)
Interrupt overview of FIFO block 7
(FIFOs 28 . . . 31)
Cologne
Chip
235 of 273
0x10
A