dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 109

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dp83630sqx

Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet

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T2.9.1
T2.9.2
T2.10.1
Parameter
Parameter
18.2.9 100BASE-TX and 100BASE-FX MII Receive Packet Latency Timing
Note: Carrier Sense On Delay is determined by measuring the time from the first bit of the “J” code group to the assertion of Carrier Sense.
Note: 1 bit time = 10 ns in 100 Mb/s mode.
Note: Enabling IEEE 1588 Receive Timestamp insertion will increase the Receive Data Latency by 40 bit times.
Note: Enabling PHY Status Frames will introduce variability in Receive Data Latency due to insertion of PHY Status Frames into the receive datapath.
18.2.10 100BASE-TX and 100BASE-FX MII Receive Packet Deassertion Timing
Note: Carrier Sense Off Delay is determined by measuring the time from the first bit of the “T” code group to the deassertion of Carrier Sense.
Note: 1 bit time = 10 ns in 100 Mb/s mode.
Carrier Sense OFF Delay
Carrier Sense ON Delay
Receive Data Latency
Description
Description
100BASE-TX mode
100BASE-FX mode
100BASE-TX mode
100BASE-FX mode
100BASE-TX mode
100BASE-FX mode
Notes
Notes
109
Min
Min
Typ
Typ
24
14
20
10
24
14
30136228
30136229
Max
Max
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Units
Units
bits
bits
bits

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