dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 72
dp83630sqx
Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83630SQX.pdf
(126 pages)
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15:8
14:9
7:0
Bit
7:0
Bit
15
14.4 LINK DIAGNOSTICS REGISTERS - PAGE 2
Page 2 Link Diagnostics Registers are accessible by setting bits [2:0] = 010 of PAGESEL (13h).
14.4.1 100 Mb Length Detect Register (LEN100_DET), Page 2
This register contains linked cable length estimation in 100 Mb operation. The cable length is an estimation of the effective cable
length based on the characteristics of the recovered signal. The cable length is valid only during 100 Mb operation with a valid Link
status indication.
14.4.2 100 Mb Frequency Offset Indication Register (FREQ100), Page 2
This register returns an indication of clock frequency offset relative to the link partner. Two values can be read, the long term
Frequency Offset, or a short term Frequency Control value. The Frequency Control value includes short term phase correction.
The variance between the Frequency Control value and the Frequency Offset can be used as an indication of the amount of jitter
in the system.
8
SAMPLE_FREQ
FREQ_OFFSET
CABLE_LEN
RESERVED
RESERVED
Bit Name
Bit Name
SEL_FC
TABLE 40. 100 Mb Frequency Offset Indication Register (FREQ100), address 0x15
TABLE 39. 100 Mb Length Detect Register (LEN100_DET), address 0x14
0000 0000, RO
1111 1111, RO
0000 0000, RO
000 000, RO
Default
Default
0, WO
0, RW
RESERVED: Writes ignored, read as 0.
Cable Length Estimate:
Indicates an estimate of effective cable length in meters. A value of
FFh indicates cable length cannot be determined.
Sample Frequency Offset:
If SEL_FC is set to a 0, then setting this bit to a 1 will poll the DSP for
the long-term Frequency Offset value. The value will be available in
the FREQ_OFFSET bits of this register.
If SEL_FC is set to a 1, then setting this bit to a 1 will poll the DSP for
the current Frequency Control value. The value will be available in the
FREQ_OFFSET bits of this register.
This register bit will always read back as 0.
RESERVED: Writes ignored, read as 0.
Select Frequency Control:
Setting this bit to a 1 will select the current Frequency Control value
instead of the Frequency Offset. This value contains Frequency Offset
plus the short term phase correction and can be used to indicate
amount of jitter in the system. The value will be available in the
FREQ_OFFSET bits of this register.
Frequency Offset:
Frequency offset value loaded from the DSP following assertion of the
SAMPLE_FREQ control bit. The Frequency Offset or Frequency
Control value is a twos-complement signed value in units of
approximately 5.1562 ppm. The range is as follows:
0x7F = +655 ppm
0x00 = 0 ppm
0x80 = -660 ppm
72
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