dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 12

• Manufacturer Part Number: dp83630sqx
• Description: Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
• Manufacturer: National Semiconductor Corporation

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X1
X2
CLK_OUT
8.3 CLOCK INTERFACE
Signal Name
X1
X2
CLK_OUT
Pin Name
I/O, PD
Type
O
I
Pin #
34
33
24
CRYSTAL/OSCILLATOR INPUT: This pin is the primary clock reference
input for the DP83630 and must be connected to a 25 MHz 0.005% (±50
ppm) clock source. The DP83630 supports either an external crystal
resonator connected across pins X1 and X2 or an external CMOS-level
oscillator source connected to pin X1 only.
RMII REFERENCE CLOCK: For RMII Slave Mode, this pin must be
connected to a 50 MHz 0.005% (±50 ppm) CMOS-level oscillator source.
In RMII Master Mode, a 25 MHz reference is required, either from an
external crystal resonator connected across pins X1 and X2 or from an
external CMOS-level oscillator source connected to pin X1 only.
CRYSTAL OUTPUT: This pin is the primary clock reference output to
connect to an external 25 MHz crystal resonator device. This pin must be
left unconnected if an external CMOS oscillator clock source is used.
CLOCK OUTPUT: This pin provides a highly configurable system clock,
which may have one of four sources:
1.
2.
3.
4.
CLOCK INPUT: This pin is used to input an external IEEE 1588 reference
clock for use by the IEEE 1588 logic. The CLK_OUT_EN strap should be
disabled in the system to prevent possible contention. The PTP_CLKSRC
register must be configured prior to enabling the IEEE 1588 function in
order to allow correct operation.
12
Relative to the internal PTP clock, with a default frequency of 25 MHz
(default)
50 MHz RMII reference clock in RMII Master Mode
25 MHz Receive Clock (same as RX_CLK) in 100 Mb mode
25 MHz or 50 MHz pass-through of X1 reference clock
Description