dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 58
dp83630sqx
Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83630SQX.pdf
(126 pages)
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Bit
8
7
6
5
4
3
2
1
0
LINK_INT_EN
DUP_INT_EN
ANC_INT_EN
SPD_INT_EN
CTR_INT_EN
RHF_INT_EN
PCF_INT_EN
PTP_INT_EN
FHF_INT_EN
LQ_INT_EN
ED_INT_EN
Bit Name
RHF_INT
PCF_INT
or
or
or
or
0, RO/COR
Default
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
Receive Error Counter half-full interrupt:
Receive error counter half-full interrupt. This function is selected if the PHYCR2
[8:7] are both 0.
1 = Receive error counter half-full interrupt is pending and is cleared by the current
read.
0 = No receive error carrier counter half-full interrupt pending.
PCF Interrupt:
PHY Control Frame interrupt. This function is selected if either of PHYCR2[8:7]
are set.
1 = PHY Control Frame interrupt is pending and is cleared by the current read.
0 = No PHY Control Frame interrupt pending.
Enable Interrupt on Link Quality Monitor event.
Enable Interrupt on energy detect event.
Enable Interrupt on change of link status.
Enable Interrupt on change of speed status.
Duplex Interrupt:
Enable Interrupt on change of duplex status. This function is selected if MICR[3]
is set to 0.
PTP Interrupt:
PTP interrupt. This function is selected if MICR[3] is set to 1.
Enable Interrupt on auto-negotiation complete event.
FHF Interrupt:
Enable Interrupt on False Carrier Counter Register halffull event. This function is
selected if the PHYCR2[8:7] are both 0.
CTR Interrupt:
Enable interrupt on either Receive Error Counter Register half-full event or False
Carrier Counter Register half-full event. This function is selected if either of
PCFCR[7:6] are set.
RHF Interrupt:
Enable Interrupt on Receive Error Counter Register halffull event. This function
is selected if the PHYCR2[8:7] are both 0.
PCF Interrupt:
Enable Interrupt on a PHY Control Frame event. This function is selected if either
of PCFCR[7:6] are set.
58
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