dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 55
dp83630sqx
Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83630SQX.pdf
(126 pages)
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Bit
5
4
3
2
1
0
AUTO-NEG COMPLETE
LOOPBACK STATUS
DUPLEX STATUS
JABBER DETECT
SPEED STATUS
LINK STATUS
Bit Name
Default
0, RO
0, RO
0, RO
0, RO
0, RO
0, RO
Jabber Detect: This bit only has meaning in 10 Mb/s mode.
This bit is a duplicate of the Jabber Detect bit in the BMSR register, except
that it is not cleared upon a read of the PHYSTS register.
1 = Jabber condition detected.
0 = No Jabber.
Auto-Negotiation Complete:
1 = Auto-Negotiation complete.
0 = Auto-Negotiation not complete.
Loopback:
1 = Loopback enabled.
0 = Normal operation.
Duplex:
This bit indicates duplex status and is determined from Auto-Negotiation or
Forced Modes.
1 = Full duplex mode.
0 = Half duplex mode.
Note: This bit is only valid if Auto-Negotiation is enabled and complete and
there is a valid link or if Auto-Negotiation is disabled and there is a valid link.
Speed10:
This bit indicates the status of the speed and is determined from Auto-
Negotiation or Forced Modes.
1 = 10 Mb/s mode.
0 = 100 Mb/s mode.
Note: This bit is only valid if Auto-Negotiation is enabled and complete and
there is a valid link or if Auto-Negotiation is disabled and there is a valid link.
Link Status:
This bit is a duplicate of the Link Status bit in the BMSR register, except that
it will not be cleared upon a read of the PHYSTS register.
1 = Valid link established (for either 10 or 100 Mb/s operation).
0 = Link not established.
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