dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 14
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dp83630sqx
Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83630SQX.pdf
(126 pages)
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RESET_N
PWRDOWN/INTN PWRDOWN/INTN
8.7 RESET AND POWER DOWN
Signal Name
RESET_N
Pin Name
Type
I, PU
I, PU
Pin #
29
7
RESET: Active Low input that initializes or re-initializes the DP83630.
Asserting this pin low for at least 1 µs will force a reset process to occur.
All internal registers will re-initialize to their default states as specified for
each bit in the Register Block section. All strap options are re-initialized
as well.
The default function of this pin is POWER DOWN.
POWER DOWN: Asserting this signal low enables the DP83630 Power
Down mode of operation. In this mode, the DP83630 will power down and
consume minimum power. Register access will be available through the
Management Interface to configure and power up the device.
INTERRUPT: This pin may be programmed as an interrupt output instead
of a Powerdown input. In this mode, Interrupts will be asserted low using
this pin. Register access is required for the pin to be used as an interrupt
mechanism. See
the interrupt mechanisms.
14
Section 9.9.2 Interrupt
Description
Mechanismsfor more details on
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