dp83630sqx National Semiconductor Corporation, dp83630sqx Datasheet - Page 32
dp83630sqx
Manufacturer Part Number
dp83630sqx
Description
Precision Phyter - Ieee 1588 Precision Time Protocol Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83630SQX.pdf
(126 pages)
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11.2.2.1 Base Line Wander Compensation
The DP83630 is completely ANSI TP-PMD compliant and in-
cludes Base Line Wander (BLW) compensation. The BLW
compensation block can successfully recover the TP-PMD
defined “killer” pattern.
11.2.2.2 Digital Adaptive Equalization and Gain Control
The DP83630 utilizes an extremely robust equalization
scheme referred as ‘Digital Adaptive Equalization.’
The Digital Equalizer removes ISI (inter symbol interference)
from the receive data stream by continuously adapting to pro-
vide a filter with the inverse frequency response of the chan-
nel. Equalization is combined with an adaptive gain control
FIGURE 7. 100BASE-TX Receive Block Diagram
32
stage. This enables the receive 'eye pattern' to be opened
sufficiently to allow very reliable data recovery.
11.2.3 Signal Detect
The signal detect function of the DP83630 is incorporated to
meet the specifications mandated by the ANSI FDDI TP-PMD
Standard as well as the IEEE 802.3 100BASE-TX Standard
for both voltage thresholds and timing parameters.
Note that the reception of normal 10BASE-T link pulses and
fast link pulses per IEEE 802.3u Auto-Negotiation by the
100BASE-TX receiver do not cause the DP83630 to assert
signal detect.
30136211
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