ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 111

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ml7084-001

Manufacturer Part Number
ml7084-001
Description
4ch Voip Codec
Manufacturer
Oki Semiconductor
Datasheet
(28) CR28
B7 : Reserved bits. Do not change the initial values.
B6 : DPGEN1 output control register
B5 : DPGEN1 output polarity control register
B4 : DPGEN1 speed control register
B3–B0 : DPGEN1 dial pulse count setting register
OKI Semiconductor
setting can be
Mode where
Initial value
0 : Stops output
1 : Output operation
0 : Positive logic (Low: Break interval; High: Make interval)
1 : Negative logic (Low:Make interval; High: Break interval)
0 : 10 pps
1 : 20 pps
Set the number of dial pulses to be transmitted.
Note: Before activating DPGEN1 (DPGEN1_EN = 1), be sure to set the following:
Note:
To activate DPGEN1, be sure to do so with TGEN1 and FSKGEN1 placed in a stop state. Using TGEN1,
FSKGEN1 and DPGEN1 concurrently is not allowed.
changed
CR28
Upper limit : 10
Lower limit : 1
• After the above setting, set the primary/secondary function selection register (GPFA[1]) of GPIOA[1]
to “1”, and set to the secondary function (dial pulse output pin).
• Set the DPGEN1 output polarity control register (DPGEN1_POL).
By this setting, the output level (initial value) of the dial pulse output pin will be as follows:
When DPGEN1_POL = 0 (positive logic)
When DPGEN1_POL = 1 (negative logic)
B7
#
0
DPGEN
1_EN
(Data: Ah)
(Data: 1h)
B6
I/E
0
DPGEN
1_POL
B5
I/
0
DPGEN
1_PPS
B4
I/E
0
DPGEN
1_D3
: DPO1 = “0”
: DPO1 = “1”
B3
I/E
0
DPGEN
1_D2
B2
I/E
0
DPGEN
1_D1
B1
I/E
0
FEDL7224-001FULL-01
DPGEN
1_D0
ML7224-001TC
B0
I/E
0
111/225
R/W
R/W

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