ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 168

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

FSK generator 1 (FSKGEN1)
The FSK generator 1 (FSKGEN1) can generate the FSK signal on the receive side of CH1.
This generator modulates the data set in a control register with frequency modulation and outputs it to VFRO1.
Table 13 shows the specifications of the FSK generator 1, and Figure 41 shows its section diagram.
The FSK generator 1 consists of an FSK signal generation section that can buffer up to 3 words, a data setting
register and a gain adjustment section. The FSK generator 1 will start operating when FGEN1_EN is set to “1”, and
continuously output a mark bit (“1”). To start transmitting data, set the first transmit data in FGEN1_D[7:0], and set
FGEN1_FLAG to “1”. When FGEN1_FLGA is set to “1”, the transmit data in FGEN1_D[7:0] is transferred to the
internal buffer if it has a free space, and clears FGEN1_FLAG to “0”. ST (Start Bit “0”) and SP (Stop Bit “1”) are
added to the data transferred to the internal buffer, and then that data is output in the transmission order shown in
Figure 42. To set the next data to be transmitted, do so when FGEN1_FLAG is “0”. While there is no data waiting to
be transmitted in the internal buffer of the FGEN signal generation section, a mark bit (“1”) is continuously output.
Note that the internal buffer of the FSK signal generation section has a 3-stage structure, and thus it can buffer up to
4 words including the FSK output data setting register FGEN1_D[7:0]. To end transmission, set FGEN1_EN to “0”
while FGEN1_FLAG is “0”. When the transmission of data set in FGEN1_D[7:0] is completed before FGEN1_EN
is set to “0”, the FSK generator 1 stops. Note that if FGEN1_EN is set to “0” while continuously transmitting a mark
bit (“1”) and there is no data waiting to be transmitted, the FSK generator 1 stops after outputting a mark bit (“1”) for
a maximum period of 1 bit. Figure 43 shows the transmission and stop timings, and Figure 44 shows a control
example. Also, the output level of the FSK generator 1 can be changed with the internal data memory
(FGEN1_GAIN).
OKI Semiconductor
Modulation method
Synchronization method
Transfer speed
Output frequencies
Output data setup register
Output level
Table 13 Specifications of FSK Generator
Figure 42 Data Transmission Sequence
Figure 41 FSK Generation Block
FGEN1_D <7:0>
FSKGEN1
BUFF_OUT
BUFF1
BUFF0
S
T
0 1 2 3 4 5 6 7
Frequency modulation
Start-stop synchronization
1200 bps
1300 Hz (Data “1” Mark)
2100 Hz (Data “0” Space)
8 bits (FGEN_D[7:0])
–13.3 dBm0
(Initial value, gain adjustment possible)
Transmission direction
FGEN_D
Related control
registers:
FGEN1_EN
FGEN1_FLAG
FGEN1_ [7:0]
FGEN1_GAIN
ST: Start Bit ("0")
SP: Stop Bit ("1")
S
P
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