ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 167

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

A. FGEN0 enable control register (FGEN0_EN)
B. FGEN0 output data setting completion flag (FGEN0_FLAG)
C. FGEN0 output data setting register (FGEN0_D[7:0])
D. Internal data memory for FGEN0 gain control (FGEN0_GAIN)
OKI Semiconductor
0: Stops FGEN0 (initial value)
1: Operates FGEN0
After writing data to the FGEN0 output data setting register (FGEN0_D[7:0]), set this bit to “1”. Once the
loading of data into the internal buffer of the FSK signal generation section is complete, this bit is automatically
cleared to “0”. Do not write to this register while this bit is “1”, however.
Initial value: 00h
Initial value: 0080h
The output level as the default will be –13.3 dBm0. Use the following equation to compute the value of the
setting when changing the output level.
Equation: 0080h×GAIN
Example: For reducing the output level by 6 dB:
0080h × 0.5 = 0040h
Upper limit
Lower limit
Note:
Make sure that the maximum amplitude does not exceed 3.17 dBm0.
: +40 dB (data: 3200h)
: −40 dB (data: 0001h)
FEDL7224-001FULL-01
ML7224-001TC
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