ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 36
ml7084-001
Manufacturer Part Number
ml7084-001
Description
4ch Voip Codec
Manufacturer
Oki Semiconductor
Datasheet
1.ML7084-001.pdf
(225 pages)
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FEDL7224-001FULL-01
OKI Semiconductor
ML7224-001TC
FUNCTIONAL DESCRIPTION
MCU Interfaces
(1) Overview
This LSI has two MCU interfaces: one for CH0a/CH1a and the other for CH0b/CH1b.
Each MCU interface consists of control registers, transmit and receive buffers, frame and DMA controllers that
control access to the transmit and receive buffers, and a DSP firmware downloader.
(2) Control Registers
A. Overview
This LSI has the following control registers:
- CR0a–CR47a control registers for performing various controls, status notification and others of CH0a/CH1a
- GPCR0a–GPCR8a control registers for general–purpose input/output ports
- DLCR0a–DLCR5a control registers for DSP firmware downloading
- CR0b–CR47b control registers for performing various controls, status notification and others of CH0b/CH1b
- GPCR0b–GPCR8b control registers for general–purpose input/output ports
- DLCR0b–DLCR5b control registers for DSP firmware downlaoding
For more information about addresses and descriptions of control registers, see the Control Register List and each
section on control register description described later.
B. Access method
The control registers can be accessed via a parallel bus interface or via the serial control interfaces described later.
The data width when accessing the control registers via a parallel bus interface must be 8-bit width of D7–D0. If a
FIFO is accessed in 16-bit access mode, the inputs/outputs of D15–D8 depend on the write and read controls to the
control registers. Either “1” or “0” is input to D15–D8 when writing, and “1” is read when reading. Figure 12 shows
the control method of the control registers.
For information about the method of accessing the control registers via serial control interfaces, see the section on
serial control interfaces described later.
A7-A0
Address
Address
D7-D0
Data
Data
CSB
WRB
RDB
Write
Read
Figure 12 Method of Controlling The Control Registers
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