ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 99

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

B7: DSP status register
(19) CR19
B6 : TD_TXDET0⎯2100 Hz phase inversion detection status register
B5 : TD_TXDET0⎯2100 Hz single-tone detection status register
B4 : TD_RXDET0⎯2100 Hz phase inversion detection status register
B3 : TD_RXDET0⎯2100 Hz single-tone detection status register
B2 : TGEN0 execution status flag indication register
B1 : MGEN high-speed read mode notification flag
B0 : MGEN execution status indication flag
OKI Semiconductor
setting can be
Mode where
This LSI has a built-in watchdog timer, and when the program of the DSP section goes into uncontrollable
Initial value
0: Normal operation state
1: Abnormal operation state
execution state due to external disturbances around this LSI or due to power supply abnormalities, etc., the DSP
status register (DSP_ERR) will be set to “1”. When this bit becomes “1”, carry out a power down reset using
either PDNB or the DSP reset control register (DSP_RESET). This bit is cleared by a power down reset
operation.
Note:
The DSP status register (DSP_ERR) cannot detect all abnormal operation conditions. The abnormality will not
0: Not detected
1: Detected
0: Not detected
1: Detected
0: Not detected
1: Detected
0: Not detected
1: Detected
0 : Being stopped
1 : Operating
0 : Other than during high-speed melody read mode
1 : During high-speed melody read mode
0 : Being stopped
1 : Operating
be detected even when the DSP goes into uncontrolled program execution if the watchdog timer gets cleared
during that program execution.
changed
CR19
_ERR
DSP
B7
⎯
0
M_TXD
ANSP
ET0
B6
⎯
0
ANS_T
XDET0
B5
⎯
0
M_RXD
ANSP
ET0
B4
⎯
0
ANS_R
XDET0
B3
⎯
0
TGEN0
_EXFL
AG
B2
⎯
0
MGEN
_FRFL
AG
B1
⎯
0
FEDL7224-001FULL-01
MGEN
_EXFL
ML7224-001TC
AG
B0
⎯
0
R/W
R/
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