ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 91

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

(11) CR11
B7, B6 : Reserved bits.
B5 : PCM input buffer 3 enable control register
B4 : PCM input buffer 2 enable control register
B3 : PCM output buffer 1 enable control register
OKI Semiconductor
setting can be
Mode where
SYNC
PCM_OTS1
[4:0]
PCMO1_EN
PCM0
ENCODE
Initial value
SYNC
PCM_ITSn
[4:0]
PCMIn_EN
DECODE
0 : Stop
1 : Activate
By setting this bit to “1”, the PCM data at the time slot position set by the PCM input buffer 3 time slot selection
register (PCM_ITS3[3:0]) is captured. The capturing of PCM data will start from the next frame in which the
setting of this bit to “1” has been detected. Figure 32 shows the PCM input timing.
0 : Stop
1 : Activate
By setting this bit to “1”, the PCM data at the time slot position set by the PCM input buffer 2 time slot selection
register (PCM_ITS2[3:0]) is captured. The capturing of PCM data will start from the next frame in which the
setting of this bit to “1” has been detected. Figure 32 shows the PCM input timing.
0 : Stop
1 : Activate
By setting this bit to “1”, PCM data is output at the time slot position set by the PCM output buffer 1 time slot
selection register (PCM_OTS1[3:0]). The outputting of PCM data will start from the next frame in which this
bit has been set to “1”. Figure 33 shows the PCM output timing.
PCMI
changed
CR11
Note: The start of ENCODE may be delayed by 1 sync depending on the timing at which PMC01_EN is set to “1”.
Hi-Z
Stop (silence output)
Stop
00000b
00000b
B7
⎯
#
0
1
DEC1 (silence output)
Do not change the initial values.
ENC1
B6
⎯
#
0
Figure 33 PCM Output Timing
Figure 32 PCM Input Timing
PCMI3_
EN
B5
/E
0
1
1
ENC2
DEC2
PCMI2_
EN
B4
/E
0
1
1
PCMO1
_EN
B3
/E
0
DEC3
ENC3
PCMI1_
EN
B2
/E
0
1
1
DEC4
ENC4
PCMI0_
EN
B1
/E
0
FEDL7224-001FULL-01
PCMO0
ML7224-001TC
Hi-Z
_EN
B0
/E
0
Stop (silence output)
Stop
R/W
R/W
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