ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 150

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

OKI Semiconductor
Outband
control
DP
trans-
mitter
DP
GEN1
Function
DP
trans-
mitter
DP
GEN0
TIMER
name
Table 11 List of Internal Data Memories and Related Control Registers (Page 11 of 12)
DPGEN0 transmit control register
(DPGEN0_EN)
DPGEN0 dial pulse count setup
register (DPGEN0_D[3:0])
DPGEN0 speed control register
(DPGEN0_PPS)
DPGEN0 output polarity control
register (DPGEN0_POL)
Internal data memory for DPGEN0
make ratio control (DPGEN0_DUTY)
Internal data memory for DPGEN0
output termination control
(DPGEN0_OFF_TIM)
DPGEN1 transmit control register
(DPGEN1_EN)
DPGEN1 dial pulse count setup
register (DPGEN1_D[3:0])
DPGEN1 speed control register
(DPGEN1_ PPS)
DPGEN1 output polarity control
register (DPGEN1_POL)
Internal data memory for DPGEN1
make ratio control (DPGEN1_DUTY)
Internal data memory for DPGEN1
output termination control
(DPGEN1_OFF_TIM)
Outband control 0
(OUTBAND_CONTROL0)
Outband control 1
(OUTBAND_CONTROL1)
Timer control register (TIM_EN)
Timer counter value indication
(TIM_COUNT)
(Read-only data memory)
Timer data setting (TIM_DATA)
Internal data memory name / related
control register name
Address
CR27-
CR27-
CR27-
CR27-
037Bh
CR28-
CR28-
CR28-
CR28-
CR45-
0379h
0380h
0382h
0336h
0337h
0350h
0351h
B[3:0]
B[3:0]
B6
B4
B5
B6
B4
B5
B5
FFFFh
03E8h
03E8h
0000b
0108h
0000b
0108h
0000h
0000h
0000h
Data
0b
0b
0b
0b
0b
0b
0b
Initial value
MAX FFFFh
Count value
Data value
Positive
Positive
125 ms
125 ms
10 pps
10 pps
33 ms
33ms
Stop
Stop
logic
Stop
Stop
logic
Stop
Stop
Stop
During
mode
initial
change of setting and
FEDL7224-001FULL-01
Mode that allows
ML7224-001TC
reading
During
state
idle
×
×
×
×
During
opera-
150/225
tion
×
×
×
×
×
×
×
×
×
×
×
×
×