ml7084-001 Oki Semiconductor, ml7084-001 Datasheet - Page 35

• Manufacturer Part Number: ml7084-001
• Description: 4ch Voip Codec
• Manufacturer: Oki Semiconductor

These are power supply pins. DVDD[6:0] is the power supply pin for the digital circuits and AVDD[1:0] is the
These are ground pins. DGND[6:0] is the ground pin for the digital circuits and AGND[1:0] is the ground pin for the
Input pin for testing. Keep the inputs to these pins at the “0” level during normal use conditions.
power supply pin for the analog circuits of the LSI. Connect these pins together in the neighborhood of the LSI and
connect as bypass capacitors a 10 μF electrolytic capacitor and a 0.1 μF ceramic capacitor in parallel between the
DGND and AGND pins.
analog circuits of the LSI. Connect these pins together in the neighborhood of the LSI.
GPIOA[1:0]_a
General-purpose input/output port A[1:0] for CH0a/CH1a. As the secondary functions of GPIOA[1:0]_a, the dial
pulse output pin for CH1a (DPO1a) and the dial pulse output pin for CH0a (DPO0a) are assigned. For unused
general-purpose input/output ports, fix inputs at either “0” or “1”.
GPIOB[3:0]_a
General-purpose input/output port B[3:0] for CH0a/CH1a. If the dial pulse detector is activated, GPIOB[1:0]_a is
used as the dial pulse inpt pin for CH1a (DPI1a) or the dial pulse inpt pin for CH0a (DPI0a). For unused
general-purpose input/output ports, fix inputs at either “0” or “1”.
GPIOC[7:0]_a
General-purpose input/output port C[7:0] for CH0a/CH1a. For unused general-purpose input/output ports, fix
inputs at either “0” or “1”.
GPIOA[1:0]_b
General-purpose input/output port A[1:0] for CH0b/CH1b. As the secondary functions of GPIOA[1:0]_b, the dial
pulse output pin for CH1b (DPO1b) and the dial pulse output pin for CH0b (DPO0b) are assigned. For unused
general-purpose input/output ports, fix inputs at either “0” or “1”.
GPIOB[3:0]_b
General-purpose input/output port B[3:0] for CH0b/CH1b. If the dial pulse detector is activated, GPIOB[1:0]_b is
used as the dial pulse input pin for CH1b (DPI1b) or the dial pulse input pin for CH0b (DPI0b). For unused
general-purpose input/output ports, fix inputs at either “0” or “1”.
GPIOC[7:0]_b
General-purpose input/output port C[7:0] for CH0b/CH1b. For unused general-purpose input/output ports, fix
inputs at either “0” or “1”.
DVDD[6:0], AVDD[1:0]
DGND[6:0], AGND[1:0]
VREGOUT[6:0]
Internal regulator voltage (approximately 2.5 V) output pin.
Connect a ceramic capacitor of about 0.1 μF in parrael to a ceramic tantalum capacitor of about 10 μF between the
VREGOUT2 pin and the ground pin. Connect a ceramic capacitor of about 0.1 μF between each of the VREGOUT
pins other than the VREGOUT2 pin, and the ground pin.
VBG
Reference voltage output pin for the internal regulator.
Connect a multilayer ceramic capacitor of about 150 pF between this pin and the ground pin.
TST[3:0]
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