am79c970 Advanced Micro Devices, am79c970 Datasheet - Page 22

• Manufacturer Part Number: am79c970
• Description: Pcnettm-pci Single-chip Ethernet Controller For Pci Local Bus
• Manufacturer: Advanced Micro Devices

Bus Master DMA Transfers
There are four primary types of DMA transfers. The
PCnet-PCI controller uses non-burst as well as burst cy-
cles for read and write access to the main memory.
Basic Non-Burst Read Cycles
The PCnet-PCI controller uses non-burst read cycles to
access the initialization block and the receive and trans-
mit descriptor entries. Some of the read accesses to the
transmit buffer memory are also in non-burst mode. All
PCnet-PCI controller non-burst read accesses are of
the PCI command type Memory Read (type 6). Note that
during all non-burst read operations, the PCnet-PCI
DEVSEL
FRAME
TRDY
IRDY
C/BE
REQ
GNT
PAR
CLK
AD
1
DEVSEL is sampled by the PCnet-PCI controller.
Figure 2. Non-Burst Read Cycle With Wait States
2
3
P R E L I M I N A R Y
ADDR
0110
Am79C970
4
PAR
controller will always activate all byte enables, even
though some byte lanes may not contain valid data as
indicated by a buffer pointer value. In such instances,
the PCnet-PCI controller will internally discard un-
needed bytes.
Figure 2 shows a typical non-burst read access. The
PCnet-PCI controller asserts IRDY at clock 5 immedi-
ately after the address phase and starts sampling
DEVSEL. The target extends the cycle by asserting
DEVSEL not until clock 6. Additionally, the target inserts
one wait state by asserting its ready (TRDY) at clock 8.
5
0000
6
7
DATA
8
PAR
9
18220C-4
AMD
1-889