am79c970 Advanced Micro Devices, am79c970 Datasheet - Page 33

• Manufacturer Part Number: am79c970
• Description: Pcnettm-pci Single-chip Ethernet Controller For Pci Local Bus
• Manufacturer: Advanced Micro Devices

Initialization Block DMA Transfers
During execution of the PCnet-PCI controller bus mas-
ter initialization procedure, the PCnet-PCI microcode
will repeatedly request DMA transfers from the BIU.
During each of these initialization block DMA transfers,
the BIU will perform two data transfer cycles (eight
bytes) and then it will relinquish the bus. The two trans-
fers within the mastership period will always be read cy-
cles to ascending contiguous addresses. When
SSIZE32 = 1 (BCR20, bit 8), there are 7 DWORDs to
1-900
DEVSEL
FRAME
AMD
TRDY
IRDY
C/BE
REQ
GNT
CLK
PAR
AD
1
DEVSEL is sampled by the PCnet-PCI controller.
2
3
IADD
0110
Figure 13. Initialization Block Read
4
i
P R E L I M I N A R Y
PAR
5
0000
Am79C970
DATA
6
transfer during the bus master initialization procedure,
so four bus mastership periods are needed in order to
complete the initialization sequence. Note that the last
DWORD transfer of the last bus mastership period of the
initialization sequence accesses an unneeded location.
Data from this transfer is discarded internally. When
SSIZE32 = 0 (BCR20, bit 8), then three bus mastership
periods are needed to complete the initialization
sequence.
PAR
7
IADD +4
0110
8
i
PAR
9
0000
DATA
10
PAR
11
18220C-15