ort82g5 Lattice Semiconductor Corp., ort82g5 Datasheet - Page 75

• Manufacturer Part Number: ort82g5
• Description: Xaui And Fc Fpscs
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operations sections of this data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
The ORCA Series 4 FPSCs include circuitry designed to protect the chips from damaging substrate injection cur-
rents and to prevent accumulations of static charge. Nevertheless, conventional precautions should be observed
during storage, handling, and use to avoid exposure to excessive electrical stress.
Recommended Operating Conditions
SERDES Electrical and Timing Characteristics
Table 31. Absolute Maximum Ratings
Storage Temperature
Power Supply Voltage with Respect to Ground
Input Signal with Respect to Ground
Signal Applied to High-impedance Output
Maximum Package Body (Soldering) Temperature
Power Supply Voltage with Respect to Ground
Input Voltages
Junction Temperature
SERDES Supply Voltage
SERDES CML I/O Supply Voltage
1. For FPGA Recommended Operating Conditions and Electrical Characteristics, see the Recommended Operating Conditions and Electri-
ORT82G5 Power
Dissipation
ORT42G5 Power
Dissipation
1. With all channels operating, 1.575V supply.
cal Characteristics tables in the ORCA Series 4 FPGA data sheet (OR4E04) and the ORCA Series 4 I/O Buffer Technical Note. FPSC
Standby Currents (IDDSB15 and IDDSB33) are tested with the Embedded Core in the powered down state.
Parameter
Parameter
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 1.25 Gbit/s
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 2.50 Gbit/s
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 3.125 Gbit/s
8b/10b Encoder/Decoder (per Channel)
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 1.25 Gbit/s
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 2.50 Gbit/s
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 3.125 Gbit/s
8b/10b Encoder/Decoder (per Channel)
Parameter
1
Conditions
V
DD
V
DD_ANA,
V
15,
Symbol
V
V
V
DDIB,
T
DDGB
Symbol
V
DD
DD
STG
V
—
—
V
V
IN
DD_ANA,
75
DD33
DD15
V
33
IO
T
IN
V
J
V
DDOB
ORCA ORT42G5 and ORT82G5 Data Sheet
DDGB
V
V
SS
SS
V
– 0.3
– 0.3
Min.
– 65
SS
—
—
1.425
1.425
1.425
Min.
– 40
– 0.3
– 0.3
3.0
– 0.3
V
V
V
DD
DD
DDIO
1.575
1.575
Max.
Max.
150
IO + 0.3
IO + 0.3
220
1.89
125
2.0
3.6
4.2
4.2
Max.
+ 0.3
195
210
225
265
275
295
50
50
1
Unit
Unit
°C
Units
°C
°C
V
V
V
V
V
mW
mW
mW
mW
mW
mW
mW
mW
V
V
V
V
V