ort82g5 Lattice Semiconductor Corp., ort82g5 Datasheet - Page 79

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ort82g5

Manufacturer Part Number
ort82g5
Description
Xaui And Fc Fpscs
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
External Reference Clock
The external reference clock selection and its interface are a critical part of system applications for this product.
Table 38 specifies reference clock requirements, over the full range of operating conditions. The designer is
encourage to read TN1040, SERDES Reference Clock, which discusses various aspects of this system element
and its interconnection.
Table 38. Reference Clock Specifications (REFCLKP and REFCLKN)
Frequency Range
Frequency Tolerance
Duty Cycle (Measured at 50% Amplitude Point)
Rise Time
Fall Time
P–N Input Skew
Differential Amplitude
Common Mode Level
Single-Ended Amplitude
Input Capacitance (at REFCLKP)
Input Capacitance (at REFCLKN)
1. This specification indicates the capability of the high speed receiver CDR PLL to acquire lock when the reference clock frequency and
Embedded Core Timing Characteristics
Table 39 summarizes the end-to-end latencies through the embedded core for the various modes. All latencies are
given in clock cycles for system clocks at half the REFCLK_[A:B] frequency. For a REFCLK_[A:B] of 156.25 MHz, a
system clock cycle is 6.4 ns.
Table 39. Signal Latencies, Embedded Core
incoming data rate are not synchronized.
Transmit Path
Receive Path
Multi-Channel Alignment Bypassed
With Multi-Channel Alignment
1. With multi-channel alignment, the latency is largest when the skew between channels is at the maximum that can be correctly
compensated for (18 clock cycles). The latency specified in the table is for data from the channel received first.
1
Parameter
1
Operating Mode
1
V
single-ended/2
79
Min.
-350
500
250
60
40
ORCA ORT42G5 and ORT82G5 Data Sheet
Typ.
0.75
500
500
800
400
50
V
DD
15 – (V
Signal Latency (max.)
13.5-22.5 clock cycles
2 x V
4.5 clock cycles
V
5 clock cycles
Max.
1000
1000
185
DDIB
350
60
75
single-ended/2
5
5
DDIB
)
mV
mV
Units
MHz
ppm
pF
pF
ps
ps
ps
%
V
p-p
p-p

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