MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 100
MC68HC912D60
Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC912D60.pdf
(460 pages)
- Current page: 100 of 460
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Flash Memory
7.7 Operation
7.7.1 Bootstrap Operation Single-Chip Mode
Technical Data
100
FEESWAI — Flash EEPROM Stop in Wait Control
HVEN — High-Voltage Enable
ERAS — Erase Control
PGM — Program Control
The Flash EEPROM can contain program and data. On reset, it can
operate as a bootstrap memory to provide the CPU with internal
initialization information during the reset sequence.
After reset, the CPU controlling the system will begin booting up by
fetching the first program address from address $FFFE.
This bit enables the charge pump to supply high voltages for program
and erase operations in the array. HVEN can only be set if either PGM
or ERAS are set and the proper sequence for program or erase is
followed.
This bit configures the memory for erase operation. ERAS is
interlocked with the PGM bit such that both bits cannot be equal to 1
or set to1 at the same time.
This bit configures the memory for program operation. PGM is
interlocked with the ERAS bit such that both bits cannot be equal to 1
or set to1 at the same time.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Do not halt Flash EEPROM clock when the part is in wait mode.
0 = Halt Flash EEPROM clock when the part is in wait mode.
0 = Disables high voltage to array and charge pump off
1 = Enables high voltage to array and charge pump on
0 = Erase operation is not selected.
1 = Erase operation selected.
0 = Program operation is not selected.
1 = Program operation selected.
Go to: www.freescale.com
Flash Memory
MC68HC912D60A — Rev 3.0
MOTOROLA
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