MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 343
MC68HC912D60
Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC912D60.pdf
(460 pages)
- Current page: 343 of 460
- Download datasheet (4Mb)
17.13.12 msCAN12 Transmit Error Counter (CTXERR)
17.13.13 msCAN12 Identifier Acceptance Registers (CIDAR0–7)
MC68HC912D60A — Rev 3.0
MOTOROLA
CTXERR
$010F
RESET
R
W
NOTE:
TXERR7
Bit 7
0
This register reflects the status of the msCAN12 transmit error counter.
The register is read only.
Both error counters must only be read when in SLEEP or SOFT_RESET
mode.
On reception each message is written into the background receive
buffer. The CPU is only signalled to read the message however, if it
passes the criteria in the identifier acceptance and identifier mask
registers (accepted); otherwise, the message is overwritten by the next
message (dropped).
The acceptance registers of the msCAN12 are applied on the IDR0 to
IDR3 registers of incoming messages in a bit by bit manner.
For extended identifiers all four acceptance and mask registers are
applied. For standard identifiers only the first two (CIDMR0/1 and
CIDAR0/1) are applied.
TXERR6
Freescale Semiconductor, Inc.
6
0
For More Information On This Product,
TXERR5
Go to: www.freescale.com
5
0
MSCAN Controller
TXERR4
4
0
TXERR3
3
0
Programmer’s Model of Control Registers
TXERR2
2
0
TXERR1
1
0
MSCAN Controller
Technical Data
TXERR0
Bit 0
0
343
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