MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 20
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MC68HC912D60
Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC912D60.pdf
(460 pages)
- Current page: 20 of 460
- Download datasheet (4Mb)
List of Tables
Technical Data
20
14-3 Prescaler Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240
15-1 Baud Rate Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .266
15-2 Loop Mode Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
15-3 SS Output Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
15-4 SPI Clock Rate Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283
16-1 MI Bus Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .301
17-1 msCAN12 Interrupt Vectors . . . . . . . . . . . . . . . . . . . . . . . . . .315
17-2 msCAN12 vsCPU operating modes . . . . . . . . . . . . . . . . . . . .317
17-3 CAN Standard Compliant Bit Time Segment Settings . . . . . . 323
17-4 Data length codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .328
17-5 Synchronization jump width . . . . . . . . . . . . . . . . . . . . . . . . . .333
17-6 Baud rate prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .333
17-7 Time segment syntax . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .334
17-8 Time segment values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .335
17-9 Identifier Acceptance Mode Settings . . . . . . . . . . . . . . . . . . .341
17-10 Identifier Acceptance Hit Indication . . . . . . . . . . . . . . . . . . . . 342
18-1 Result Data Formats Available . . . . . . . . . . . . . . . . . . . . . . . . 361
18-2 Left Justified ATD Output Codes . . . . . . . . . . . . . . . . . . . . . . 362
18-3 ATD Response to Background Debug Enable . . . . . . . . . . . . 364
18-4 Final Sample Time Selection . . . . . . . . . . . . . . . . . . . . . . . . .365
18-5 Clock Prescaler Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .366
18-6 Conversion Sequence Length Coding . . . . . . . . . . . . . . . . . .367
18-7 Result Register Assignment for Different Conversion
18-8 Special Channel Conversion Select Coding . . . . . . . . . . . . . .368
18-9 Analog Input Channel Select Coding . . . . . . . . . . . . . . . . . . .369
18-10 Multichannel Mode Result Register Assignment (MULT=1) . .370
19-1 IPIPE Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 378
19-2 Hardware Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 384
19-3 BDM Firmware Commands . . . . . . . . . . . . . . . . . . . . . . . . . .385
19-4 BDM registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .387
19-5 TTAGO Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .392
19-6 TTAGO Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .392
19-7 Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 392
19-8 REGN Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .392
19-9 Breakpoint Mode Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 398
19-10 Breakpoint Address Range Control . . . . . . . . . . . . . . . . . . . . 399
19-11 Breakpoint Read/Write Control . . . . . . . . . . . . . . . . . . . . . . . . 401
Freescale Semiconductor, Inc.
For More Information On This Product,
Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .367
Go to: www.freescale.com
List of Tables
MC68HC912D60A — Rev 3.0
MOTOROLA
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