MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 340

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MC68HC912D60

Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
MSCAN Controller
17.13.9 msCAN12 Transmitter Control Register (CTCR)
Technical Data
340
CTCR
$0107
RESET
WARNING:
R
W
NOTE:
NOTE:
Bit 7
0
0
To ensure data integrity, no registers of the transmit buffers should be written
to while the associated TXE flag is cleared.
The CTFLG register is held in the reset state if the SFTRES bit CMCR0 is set.
ABTRQ2 – ABTRQ0 — Abort Request
The software must not clear one or more of the TXE flags in CTFGL and
simultaneously set the respective ABTRQ bit(s).
ABTRQ2
transmission request was successfully aborted due to a pending abort
request
a transmit interrupt is pending while this flag is set.
Clearing a TXEx flag also clears the corresponding ABTAKx flag (see
above). When a TXEx flag is set, the corresponding ABTRQx bit is
cleared (see
The CPU sets an ABTRQx bit to request that a scheduled message
buffer (TXEx = 0) shall be aborted. The msCAN12 grants the request
if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a
message is aborted the associated TXE and the Abort Acknowledge
flag (ABTAK, see
set and an TXE interrupt is generated if enabled. The CPU cannot
reset ABTRQx. ABTRQx is cleared implicitly whenever the
associated TXE flag is set.
Freescale Semiconductor, Inc.
6
0
For More Information On This Product,
0 = The associated message buffer is full (loaded with a message
1 = The associated message buffer is empty (not scheduled).
0 = No abort request.
1 = Abort request pending.
due for transmission).
(msCAN12 Transmitter Control Register
ABTRQ1
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5
0
msCAN12 Transmitter Control Register
MSCAN Controller
msCAN12 Transmitter Flag Register
ABTRQ0
4
0
3
0
0
TXEIE2
2
0
MC68HC912D60A — Rev 3.0
(CTCR)). If not masked,
TXEIE1
1
0
(CTCR)).
(CTFLG)) are
MOTOROLA
TXEIE0
Bit 0
0

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