MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 329
MC68HC912D60
Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC912D60.pdf
(460 pages)
- Current page: 329 of 460
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17.12.4 Data Segment Registers (DSRn)
17.12.5 Transmit Buffer Priority Registers (TBPR)
MC68HC912D60A — Rev 3.0
MOTOROLA
1. x is 5, 6, or 7 depending on which buffer Tx0, Tx1, or Tx2 respectively.
TBPR
$01xD
RESET
(1)
R
W
PRIO7
BIT 7
–
The eight data segment registers contain the data to be transmitted or
being received. The number of bytes to be transmitted or being received
is determined by the data length code in the corresponding DLR.
PRIO7 – PRIO0 — Local Priority
PRIO6
BIT 6
This field defines the local priority of the associated message buffer.
The local priority is used for the internal prioritisation process of the
msCAN12 and is defined to be highest for the smallest binary number.
The msCAN12 implements the following internal prioritisation
mechanism:
•
•
•
Freescale Semiconductor, Inc.
–
For More Information On This Product,
All transmission buffers with a cleared TXE flag participate in the
prioritisation immediately before the SOF (Start of Frame) is sent.
The transmission buffer with the lowest local priority field wins the
prioritisation.
In cases of more than one buffer having the same lowest priority,
the message buffer with the lower index number wins.
PRIO5
BIT 5
Go to: www.freescale.com
–
MSCAN Controller
PRIO4
BIT 4
–
PRIO3
BIT 3
–
Programmer’s Model of Message Storage
PRIO2
BIT 2
–
PRIO1
BIT 1
–
MSCAN Controller
Technical Data
PRIO0
BIT 0
–
329
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