MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 213

• Manufacturer Part Number: MC68HC912D60
• Description: Microcontrollers
• Manufacturer: Motorola

MC68HC912D60A — Rev 3.0
MOTOROLA
PCLK0 — PWM Channel 0 Clock Select
The following four bits apply in left-aligned mode only:
PPOL3 — PWM Channel 3 Polarity
PPOL2 — PWM Channel 2 Polarity
PPOL1 — PWM Channel 1 Polarity
PPOL0 — PWM Channel 0 Polarity
Depending on the polarity bit, the duty registers may contain the count
of either the high time or the low time. If the polarity bit is zero and left
alignment is selected, the duty registers contain a count of the low time.
If the polarity bit is one, the duty registers contain a count of the high
time.
If a clock select is changed while a PWM signal is being generated, a
truncated or stretched pulse may occur during the transition.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Clock A is the clock source for channel 0.
1 = Clock S0 is the clock source for channel 0.
0 = Channel 3 output is low at the beginning of the period; high
1 = Channel 3 output is high at the beginning of the period; low
0 = Channel 2 output is low at the beginning of the period; high
1 = Channel 2 output is high at the beginning of the period; low
0 = Channel 1 output is low at the beginning of the period; high
1 = Channel 1 output is high at the beginning of the period; low
0 = Channel 0 output is low at the beginning of the period; high
1 = Channel 0 output is high at the beginning of the period; low
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
when the duty count is reached.
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Pulse Width Modulator
PWM Register Description
Pulse Width Modulator
Technical Data
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