MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 268
MC68HC912D60
Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC68HC912D60.pdf
(460 pages)
- Current page: 268 of 460
- Download datasheet (4Mb)
Multiple Serial Interface
SC0CR1/SC1CR1 — SCI Control Register 1
Technical Data
268
RESET:
LOOPS
Bit 7
0
WOMS
6
0
BTST — Reserved for test function
BSPL — Reserved for test function
BRLD — Reserved for test function
Read or write anytime.
LOOPS — SCI LOOP Mode/Single Wire Mode Enable
WOMS — Wired-Or Mode for Serial Pins
If the DDRS bit associated with the TXD pin is set during the LOOPS
= 1, the TXD pin outputs the SCI waveform. If the DDRS bit
associated with the TXD pin is clear during the LOOPS = 1, the TXD
pin becomes high (IDLE line state) for RSRC = 0 and high impedance
for RSRC = 1. Refer to
This bit controls the two pins (TXD and RXD) associated with the SCIx
section.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = SCI transmit and receive sections operate normally.
1 = SCI receive section is disconnected from the RXD pin and the
0 = Pins operate in a normal mode with both high and low drive
1 = Each pin operates in an open drain fashion if that pin is
RSRC
5
0
RXD pin is available as general purpose I/O. The receiver input is
determined by the RSRC bit. The transmitter output is controlled
by the associated DDRS bit. Both the transmitter and the receiver
must be enabled to use the LOOP or the single wire mode.
capability. To affect the RXD bit, that bit would have to be
configured as an output (via DDS0/2) which is the single wire
case when using the SCI. WOMS bit still affects general purpose
output on TXD and RXD pins when SCIx is not using these pins.
declared as an output.
Go to: www.freescale.com
Multiple Serial Interface
M
4
0
WAKE
Table
3
0
15-2.
ILT
2
0
PE
MC68HC912D60A — Rev 3.0
1
0
Bit 0
PT
0
$00C2/$00CA
MOTOROLA
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