MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 341

• Manufacturer Part Number: MC68HC912D60
• Description: Microcontrollers
• Manufacturer: Motorola

17.13.10 msCAN12 Identifier Acceptance Control Register (CIDAC)
MC68HC912D60A — Rev 3.0
MOTOROLA
CIDAC
$0108
RESET
R
W
NOTE:
Bit 7
0
0
TXEIE2 – TXEIE0 — Transmitter Empty Interrupt Enable
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
IDAM1 – IDAM0 — Identifier Acceptance Mode
The CPU sets these flags to define the identifier acceptance filter
organisation (see
summarizes the different settings. In Filter Closed mode no
messages are accepted such that the foreground buffer is never
reloaded.
Freescale Semiconductor, Inc.
6
0
0
For More Information On This Product,
0 = No interrupt will be generated from this event.
1 = A transmitter empty (transmit buffer available for transmission)
event will result in a transmitter empty interrupt.
Table 17-9. Identifier Acceptance Mode Settings
IDAM1
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IDAM1
5
0
0
0
1
1
MSCAN Controller
Identifier Acceptance
IDAM0
IDAM0
4
0
0
1
0
1
Four 16 bit Acceptance Filters
Identifier Acceptance Mode
Two 32 bit Acceptance Filters
Eight 8 bit Acceptance Filters
3
0
0
Programmer’s Model of Control Registers
Filter Closed
Filter).
IDHIT2
2
0
Table 17-8
IDHIT1
1
0
MSCAN Controller
Technical Data
IDHIT0
Bit 0
0
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