MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 445

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MC68HC912D60

Manufacturer Part Number
MC68HC912D60
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
23.7 PLL
MC68HC912D60A — Rev 3.0
MOTOROLA
Appendix: Information on MC68HC912D60A Mask Set Changes
The limp Home clock frequency has been re-alligned to the specification
values to reduce sensitivity to system noise and hence reduce PLL jitter.
Note: It is advisable to verify the XFC filter components and PLL lock
time due to the above changes.
VCO start-up will now be at the minimum frequency whilst the power up
sequence of the current controlled oscillator has been improved.
The XFC pin is now preconditioned to VDDPLL when PLL is deselected
so XFC doesn’t float. This ensures the PLL starts up at low frequency
and ramps up to the desired frequency.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Appendix: Information on MC68HC912D60A Mask Set Changes
Technical Data
PLL
445

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