MC68HC912D60 Motorola, MC68HC912D60 Datasheet - Page 235

• Manufacturer Part Number: MC68HC912D60
• Description: Microcontrollers
• Manufacturer: Motorola

OC7D — Output Compare 7 Data Register
TCNT — Timer Count Register
MC68HC912D60A — Rev 3.0
MOTOROLA
RESET:
RESET:
OC7D7
Bit 15
Bit 7
Bit 7
Bit 7
0
0
OC7D6
14
6
0
6
6
0
Read or write anytime.
The bits of OC7D correspond bit-for-bit with the bits of timer port
(PORTT). When a successful OC7 compare occurs, for each bit that is
set in OC7M, the corresponding data bit in OC7D is stored to the
corresponding bit of the timer port.
When the OC7Mn bit is set, a successful OC7 action will override a
successful OC[6:0] compare action during the same cycle; therefore, the
OCn action taken will depend on the corresponding OC7D bit.
The 16-bit main timer is an up counter.
A full access for the counter register should take place in one clock cycle.
A separate read/write for high byte and low byte will give a different result
than accessing them as a word.
Read anytime.
Write has no meaning or effect in the normal mode; only writable in
special modes (SMODN = 0).
The period of the first count after a write to the TCNT registers may be a
different size because the write is not synchronized with the prescaler
clock.
Freescale Semiconductor, Inc.
For More Information On This Product,
OC7D5
13
5
0
5
5
0
Go to: www.freescale.com
Enhanced Capture Timer
OC7D4
12
4
0
4
4
0
OC7D3
11
3
0
3
3
0
OC7D2
10
2
0
2
2
0
OC7D1
1
0
1
9
1
0
Enhanced Capture Timer
OC7D0
Bit 0
Bit 0
Bit 8
Bit 0
0
0
Timer Registers
Technical Data
$0084–$0085
$0083
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