MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 142

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Clock Generator Module (CGM)
Advance Information
142
These conditions apply when the PLL is in automatic bandwidth control
mode:
The PLL also can operate in manual mode (AUTO = 0). Manual mode is
used by systems that do not require an indicator of the lock condition for
proper operation. Such systems typically operate well below f
require fast startup. The following conditions apply when in manual
mode:
Freescale Semiconductor, Inc.
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For More Information On This Product,
The ACQ bit (See 8.6.2 PLL Bandwidth Control Register.) is a
read-only indicator of the mode of the filter. See
Tracking Modes
The ACQ bit is set when the VCO frequency is within a certain
tolerance,
certain tolerance,
444.
The LOCK bit is a read-only indicator of the locked state of the
PLL.
The LOCK bit is set when the VCO frequency is within a certain
tolerance,
a certain tolerance,
444.
CPU interrupts can occur if enabled (PLLIE = 1) when the PLL’s
lock condition changes, toggling the LOCK bit. See
Register
ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
Before entering tracking mode (ACQ = 1), software must wait a
given time, t
turning on the PLL by setting PLLON in the PLL control register
(PCTL).
Software must wait a given time, t
before selecting the PLL as the clock source to CGMOUT
(BCS = 1).
The LOCK bit is disabled.
Clock Generator Module (CGM)
Go to: www.freescale.com
on page 149.
acq
trk
Lock
, and is cleared when the VCO frequency is out of a
(see
, and is cleared when the VCO frequency is out of
on page 141.
unt
Electrical Specifications
unl
. See
. See
Electrical Specifications
Electrical Specifications
al
, after entering tracking mode
68HC908AZ32A — Rev 0.0
on page 444), after
Acquisition and
PLL Control
busmax
on page
MOTOROLA
on page
and