MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 145
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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8.4.2.5 Special Programming Exceptions
8.4.3 Base Clock Selector Circuit
68HC908AZ32A — Rev 0.0
MOTOROLA
The programming method described in
143, does not account for two possible exceptions. A value of 0 for N or
L is meaningless when used in the equations given. To account for these
exceptions:
This circuit is used to select either the crystal clock, CGMXCLK, or the
VCO clock, CGMVCLK, as the source of the base clock, CGMOUT. The
two input clocks go through a transition control circuit that waits up to
three CGMXCLK cycles and three CGMVCLK cycles to change from
one clock source to the other. During this time, CGMOUT is held in
stasis. The output of the transition control circuit is then divided by two
to correct the duty cycle. Therefore, the bus clock frequency, which is
one-half of the base clock frequency, is one-fourth the frequency of the
selected clock (CGMXCLK or CGMVCLK).
The BCS bit in the PLL control register (PCTL) selects which clock drives
CGMOUT. The VCO clock cannot be selected as the base clock source
if the PLL is not turned on. The PLL cannot be turned off if the VCO clock
is selected. The PLL cannot be turned on or off simultaneously with the
selection or deselection of the VCO clock. The VCO clock also cannot
be selected as the base clock source if the factor L is programmed to a
0. This value would set up a condition inconsistent with the operation of
the PLL, so that the PLL would be disabled and the crystal clock would
be forced as the source of the base clock.
Freescale Semiconductor, Inc.
•
•
For More Information On This Product,
A 0 value for N is interpreted the same as a value of 1.
A 0 value for L disables the PLL and prevents its selection as the
source for the base clock. See
page 145.
a. In the upper four bits of the PLL programming register (PPG),
b. In the lower four bits of the PLL programming register (PPG),
Clock Generator Module (CGM)
program the binary equivalent of N.
program the binary equivalent of L.
Go to: www.freescale.com
Base Clock Selector Circuit
Programming the PLL
Clock Generator Module (CGM)
Functional Description
Advance Information
on page
on
145
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