MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 386

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

I/O Ports
23.9.2 Data Direction Register G
Advance Information
386
NOTE:
Address:
Data direction register G determines whether each port G pin is an input
or an output. Writing a logic 1 to a DDRG bit enables the output buffer
for the corresponding port G pin; a logic 0 disables the output buffer.
DDRG[2:0] — Data Direction Register G Bits
Avoid glitches on port G pins by writing to the port G data register before
changing data direction register G bits from 0 to 1.
Figure 23-22
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
These read/write bits control port G data direction. Reset clears
DDRG[2:0], configuring all port G pins as inputs.
For More Information On This Product,
1 = Corresponding port G pin configured as output
0 = Corresponding port G pin configured as input
READ DDRG ($000E)
WRITE DDRG ($000E)
WRITE PTG ($000A)
READ PTG ($000A)
$000E
Bit 7
Figure 23-21. Data Direction Register G (DDRG)
R
R
0
0
Go to: www.freescale.com
shows the port G I/O logic.
= Reserved
R
6
0
0
Figure 23-22. Port G I/O Circuit
I/O Ports
RESET
R
5
0
0
DDRGx
R
PTGx
4
0
0
R
3
0
0
68HC908AZ32A — Rev 0.0
DDRG2
2
0
DDRG1
1
0
MOTOROLA
DDRG0
Bit 0
0
PTGx