MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 324
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Timer Interface Module B (TIMB)
19.8.2 TIMB Channel I/O Pins (PTF5/TBCH1–PTF4)
19.9 I/O Registers
19.9.1 TIMB Status and Control Register
Advance Information
324
The maximum TCLK frequency is the least: 4 MHz or bus frequency 2.
PTD4/ATD12 is available as a general-purpose I/O pin or ADC channel
when not used as the TIMB clock input. When the PTD4/ATD12 pin is
the TIMB clock input, it is an input regardless of the state of the DDRD4
bit in data direction register D.
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTF4 and PTF5/TBCH1 can be
configured as buffered output compare or buffered PWM pins.
These I/O registers control and monitor TIMB operation:
The TIMB status and control register:
Freescale Semiconductor, Inc.
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For More Information On This Product,
TIMB status and control register (TBSC)
TIMB control registers (TBCNTH–TBCNTL)
TIMB counter modulo registers (TBMODH–TBMODL)
TIMB channel status and control registers (TBSC0 and TBSC1)
TIMB channel registers (TBCH0H–TBCH0L, TBCH1H–TBCH1L)
Enables TIMB overflow interrupts
Flags TIMB overflows
Stops the TIMB counter
Resets the TIMB counter
Prescales the TIMB counter clock
Timer Interface Module B (TIMB)
Go to: www.freescale.com
68HC908AZ32A — Rev 0.0
MOTOROLA
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