MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 377

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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68HC908AZ32A — Rev 0.0
MOTOROLA
Figure 23-13
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx
data latch. When bit DDRDx is a logic 0, reading address $0003 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port D pins.
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
DDRD
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
PTD
Bit
X
X
Go to: www.freescale.com
shows the port D I/O logic.
Input, Hi-Z
I/O Pin
Output
Table 23-4. Port D Pin Functions
Mode
Figure 23-13. Port D I/O Circuit
I/O Ports
RESET
Accesses to
Read/Write
DDRD[7:0]
DDRD[7:0]
DDRD
DDRDx
PTDx
PTD[7:0]
Table 23-4
Read
Pin
Accesses to PTD
Advance Information
summarizes
PTD[7:0]
PTD[7:0]
Write
I/O Ports
Port D
(1)
PTDx
377

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