MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 436

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MC68HC908AZ32ACFU

Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet

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MSCAN Controller (MSCAN08)
24.14.8 MSCAN08 Transmitter Control Register
Advance Information
436
NOTE:
NOTE:
Address:
ABTRQ2–ABTRQ0 — Abort Request
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
The CPU sets an ABTRQx bit to request that an already scheduled
message buffer (TXE = 0) be aborted. The MSCAN08 will grant the
request if the message has not already started transmission, or if the
transmission is not successful (lost arbitration or error). When a
message is aborted the associated TXE and the abort acknowledge
flag (ABTAK) (see
434) will be set and an TXE interrupt is generated if enabled. The
CPU cannot reset ABTRQx. ABTRQx is cleared implicitly whenever
the associated TXE flag is set.
For More Information On This Product,
1 = Abort request pending
0 = No abort request
1 = A transmitter empty (transmit buffer available for transmission)
0 = No interrupt is generated from this event.
Figure 24-22. Transmitter Control Register (CTCR)
$0507
Bit 7
event results in a transmitter empty interrupt.
0
0
MSCAN Controller (MSCAN08)
Go to: www.freescale.com
ABTRQ2 ABTRQ1 ABTRQ0
= Unimplemented
6
0
MSCAN08 Transmitter Flag Register
5
0
4
0
3
0
0
68HC908AZ32A — Rev 0.0
TXEIE2
2
0
TXEIE1
1
0
MOTOROLA
on page
TXEIE0
Bit 0
0

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