MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 252
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Serial Peripheral Interface (SPI)
17.5.1 Master Mode
Advance Information
252
NOTE:
SHIFT REGISTER
GENERATOR
BAUD RATE
MASTER MCU
Figure 17-2. Full-Duplex Master-Slave Connections
The SPI operates in master mode when the SPI master bit, SPMSTR
(SPCR $0010), is set.
Configure the SPI modules as master and slave before enabling them.
Enable the master SPI before enabling the slave SPI. Disable the slave
SPI before disabling the master SPI. See
271.
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the SPI data
register. If the shift register is empty, the byte immediately transfers to
the shift register, setting the SPI transmitter empty bit, SPTE (SPSCR
$0011). The byte begins shifting out on the MOSI pin under the control
of the serial clock. (See
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See
on page 274). Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
Freescale Semiconductor, Inc.
For More Information On This Product,
MISO
MOSI
SPSCK
SS
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
V
Table
DD
17-4).
SPSCK
MISO
MOSI
SPI Status and Control Register
SS
SPI Control Register
SHIFT REGISTER
SLAVE MCU
68HC908AZ32A — Rev 0.0
MOTOROLA
on page
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