MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 172
MC68HC908AZ32ACFU
Manufacturer Part Number
MC68HC908AZ32ACFU
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AZ32ACFU.pdf
(468 pages)
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Break Module
11.4.3 TIM During Break Interrupts
11.4.4 COP During Break Interrupts
11.5 Low-Power Modes
11.5.1 Wait Mode
11.5.2 Stop Mode
Advance Information
172
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counter.
The COP is disabled during a break interrupt when V
RST pin.
The WAIT and STOP instructions put the MCU in low power-consump-
tion standby modes.
If enabled, the break module is active in wait mode. The SIM break wait
bit (BW) in the SIM break status register indicates whether wait was
exited by a break interrupt. If so, the user can modify the return address
on the stack by subtracting one from it. (See
on page 132).
The break module is inactive in stop mode. The STOP instruction does
not affect break module register states.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Break Module
SIM Break Status Register
68HC908AZ32A — Rev 0.0
Hi
is present on the
MOTOROLA
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