MC68HC908AZ32ACFU MOTOROLA [Motorola, Inc], MC68HC908AZ32ACFU Datasheet - Page 272

• Manufacturer Part Number: MC68HC908AZ32ACFU
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Serial Peripheral Interface (SPI)
Advance Information
272
Address:
SPRIE — SPI Receiver Interrupt Enable Bit
SPMSTR — SPI Master Bit
CPOL — Clock Polarity Bit
CPHA — Clock Phase Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
•
•
This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
This read/write bit selects master mode operation or slave mode
operation. Reset sets the SPMSTR bit.
This read/write bit determines the logic state of the SPSCK pin
between transmissions. (See
transmit data between SPI modules, the SPI modules must have
identical CPOL bits. Reset clears the CPOL bit.
This read/write bit controls the timing relationship between the serial
clock and SPI data. (See
data between SPI modules, the SPI modules must have identical
For More Information On This Product,
1 = SPRF CPU interrupt requests enabled
0 = SPRF CPU interrupt requests disabled
1 = Master mode
0 = Slave mode
Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
Enables the SPI module
SPRIE
$0010
Bit 7
R
0
Serial Peripheral Interface (SPI)
Figure 17-11. SPI Control Register (SPCR)
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= Reserved
R
6
0
SPMSTR
5
1
Figure 17-3
Figure 17-3
CPOL
4
0
and
CPHA
3
1
and
Figure
SPWOM
68HC908AZ32A — Rev 0.0
Figure
2
0
17-4.) To transmit
17-4.) To
SPE
1
0
MOTOROLA
SPTIE
Bit 0
0