HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 227

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

6.2.7
BARCH
BARCL
Break address register C (BARC) consists of two 16-bit readable/writable registers: break address
register CH (BARCH) and break address register CL (BARCL). BARCH specifies the upper half
(bits 31 to 16) of the address used as a channel C break condition, and BARCL specifies the lower
half (bits 15 to 0). The address bus connected to the X/Y memory can also be specified as a break
condition by making a setting in the XYEC bit/XYSC bit in break bus cycle register C (BBRC).
When XYEC = 0, BAC31 to BAC0 specify the address. When XYEC = 1, the upper 16 bits
(BAC31 to BAC16) of BARC specify the X address bus, and the lower 16 bits (BAC15 to BAC0)
specify the Y address bus. BARCH and BARCL are initialized to H'0000 by a power-on reset;
after a manual reset, their values are undefined.
Initial value:
Initial value:
Initial value:
Initial value:
Break Address Register C (BARC)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
BAC31
BAC23
BAC15
BAC7
R/W
R/W
R/W
R/W
15
15
0
7
0
0
7
0
BAC30
BAC22
BAC14
BAC6
R/W
R/W
R/W
R/W
14
14
0
6
0
0
6
0
BAC29
BAC21
BAC13
BAC5
R/W
R/W
R/W
R/W
13
13
0
5
0
0
5
0
BAC28
BAC20
BAC12
BAC4
R/W
R/W
R/W
R/W
12
12
0
4
0
0
4
0
BAC27
BAC19
BAC11
BAC3
R/W
R/W
R/W
R/W
11
11
0
3
0
0
3
0
BAC26
BAC18
BAC10
BAC2
R/W
R/W
R/W
R/W
10
10
0
2
0
0
2
0
BAC25
BAC17
BAC9
BAC1
R/W
R/W
R/W
R/W
9
0
1
0
9
0
1
0
BAC24
BAC16
BAC8
BAC0
R/W
R/W
R/W
R/W
8
0
0
0
8
0
0
0
209