HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 697
HD6417615
Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6417615.pdf
(873 pages)
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Example of PWM Mode Setting Procedure: Figure 16.21 shows an example of the PWM mode
setting procedure.
Examples of PWM Mode Operation: Figure 16.22 shows an example of PWM mode 1
operation.
In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA
initial output value and output value, and 1 output is set as the TGRB output value.
In this case, the value set in TGRA is used as the period, and the values set in TGRB registers as
the duty.
Select counter clearing source
Select waveform output level
Select counter clock
Set PWM mode
<PWM mode>
PWM mode
Start count
Set TGR
Figure 16.21 Example of PWM Mode Setting Procedure
1
2
3
4
5
6
3
4
5
6
1
2
Select the counter clock with bits TPSC2 to
TPSC0 in TCR. At the same time, select the
input clock edge with bits CKEG1 and CKEG0
in TCR.
Use bits CCLR2 to CCLR0 in TCR to select
the TGR to be used as the TCNT clearing
source.
Use TIOR to designate the TGR as an output
compare register, and select the initial value
and output value.
Set the cycle in the TGR selected in [2], and
set the duty in the other the TGR.
Select the PWM mode with bits MD3 to MD0
in TMDR.
Set the CST bit in TSTR to 1 to start the count
operation.
685
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